1. Field of the Invention
The present invention relates to the management of status information generated by I/O devices in data processing systems; and more particularly to a combination of interrupt and polling techniques for servicing events identified by the status information.
2. Description of Related Art
Two common techniques for servicing input/output (I/O) events in a computer system include one commonly referred to as a polling technique, and one commonly referred to as an interrupt technique.
A processor using a polling technique regularly reads the status of devices that may need service. This checking is done in the normal course of execution of a control routine, and therefore may not be very responsive to events which occur asynchronously. Devices that must be serviced in a short time period may overrun their allocated resources before the processor managing the resources responds to the indication. Also, polling may use a large number of processor cycles when no operations are necessary, as the processor polls and finds nothing to do for a particular device.
Interrupts are used to solve some real time disadvantages of polling. When a device needs service, it activates an interrupt mechanism that causes the processor to execute an interrupt service routine. The interrupt service routine stops the processor in the middle of execution of a program, stores the current status information of that program, and branches to a routine to service the event signalled by the interrupt. This provides relatively fast response to devices that need system resources in a short time period, while allowing the processor to execute other tasks independent of these devices. Interrupts provide a good mechanism for notifying the processor that service is needed right away. However, if the device can continue operation without processor intervention, then interrupting causes extra cycles involved in stopping a current program, saving processor status, and executing the interrupt service routine. With heavy traffic loads, this overhead can become a significant performance penalty for a processor servicing the interrupts.
In communication switching systems, such as routers and the like, network interface devices are coupled to a plurality of asynchronous networks. A buffer memory is provided so that a given network interface device can begin receiving a packet across a corresponding network, and storing data from the packet into the buffer. Status information is posted to a processor managing the router, which then detects the destination of the packet and performs necessary routing routines on the packet. In routers using a pure interrupt system, a smaller buffer memory may be allocated for each device because of the quick response by the host. However, the wasted CPU cycles in unproductive context switching of interrupt service routines can be a significant drain on system throughput for moderate and heavily loaded systems.
Strictly polled systems in the routing environment require larger buffers for each I/O device, in order to account for worst case response by the managing CPU. However, the polled system may have greater average throughput because of less waste of CPU processing power.
It is desirable to maximize the throughput of processors servicing I/O devices, while managing the size of buffers and other resources required.